What is a 128-bit XMM register?

The 128-bit XMM registers are part of the SSE extension (where SSE is short for Streaming SIMD Extension, and SIMD, in turn, stands for single instruction multiple data ). There are eight XMM registers available in non -64-bit modes and 16 XMM registers in long mode, which allow simultaneous operations on:

How many XMM registers are there in a processor?

XMM registers. The 128-bit XMM registers are part of the SSE extension (where SSE is short for Streaming SIMD Extension, and SIMD, in turn, stands for single instruction multiple data). There are eight XMM registers available in non -64-bit modes and 16 XMM registers in long mode, which allow simultaneous operations on: 16 bytes.

Is there a difference between XMM and YMM registers?

Reading a YMM register is not logically different from reading an XMM register, but writing the low element (and leaving the other elements unmodified, like the poorly-designed vcvtsi2ss does) would be different for XMM vs. YMM, because the YMM version would leave the upper lane not zeroed.

What is XMM0 and EAX?

xmm0 is the low half of ymm0, exactly like eax is the low half of rax. Writing to xmm0 (with a VEX-coded instruction, not legacy SSE) zeros the upper lane of ymm0, just like writing to eax zeros the upper half of rax to avoid false dependencies.